M.Tech. program
The M-Tech. program is a two-year course oriented graduate program. The student has to take a set of core courses and a set of electives. The course work is spread accross the first two semesters with an option of taking one elective in the third semester. This is followed by a project in the third and fourth semester in which the student can take up a project of his or her interest, supervised by a faculty member.
PG Syllabus :
Course structure of Master of Technology in VLSI Design
I. FIRST SEMESTER (Section A Examination)
(A) Theory Papers a) Field Subjects |
|||
Sl. No. | Field Subjects | Weekly Contact Hours | Marks |
1 | Paper I : Semiconductor Physics & Devices (VLSI 901) | 3 | 100 |
2 | Paper II : VLSI Circuits & Systems (VLSI 902) | 3 | 100 |
3 | Paper III : VLSI Testing (VLSI 903) | 3 | 100 |
b) Elective Subjects |
|||
Sl. No. | Field Subjects | Weekly Contact Hours | Marks |
4 | Paper IV : (Elective I) (VLSI 904/X) | 3 | 100 |
5 | Paper V : (Elective II) (VLSI 905/X) | 3 | 100 |
(B) Sessional on Subjects |
|||
Sl. No. | Field Subjects | Weekly Contact Hours | Marks |
6 | Paper I, II, III (VLSI 951) | 6 | 90 |
7 | Sessional on Paper IV : (VLSI 952/X) | 2 | 30 |
8 | Sessional on Paper V : (VLSI 953/X) | 2 | 30 |
Total | 25 | 650 |
Theory Paper
Semiconductor Physics & Devices (VLSI 901)
The basic MOS inverter, transfer characteristics, logic threshold, NAND and NOR logic. Transittimes and inverter pair delay. Depletion and enhancement loads. Technological option in MOS processing, CMOS, Design considerations in combinational logic, Shift register arrays. MOS memories and programmable logic arrays. Non-volatile memories with MOS technology. Short cahnnel structures. Scaled down MOS performance. Other MOS LSI considerations.
VLSI Circuits & Systems (VLSI 902)
An introduction to the design and implementation of very large scale integrated systems, integrated devices, circuits , digital subsystems , and system architecture, basic procedures for designing and implementing digital integrated systems , structured design methodology, techniques for the estimating delay times, layout artifacts, techniques for the physical design of high-speed VLSI circuits, Topics related to interconnection circuit modeling, performance-driven routing, buffer and wire sizing, placement and floor planning, technology mapping and performance evaluation.
VLSI Testing (VLSI 903)
Physical Faults and their modeling , Stuck-at Faults, Bridging Faults ; Faulty Collapsing ; Fault Simulation; Deductive, Parallel , and Concurrent Fault Simulation; Critical Path Tracing A TPG for Combinational Circuits; D-Algorithm, Boolean Difference ,Podem; Random, Deterministic and Weighted Random Test Pattern Generation; Aliasing and its Effect on Fault Coverage; PLA Testing , Cross Point Fault Model and Test Generation; Memory Testing – Permanent ; Intermittent and Pattern Sensitive Faults, Marching Tests; Delay Faults; ATPG for Sequential Circuits; Time Frame Expansion; Controllability And Observability Scan Design; BIST and Totally Self checking Circuits; System level Diagnosis; Concept of redundancy, Spatial Redundancy , Time Redundancy , Yield Modeling , Reliability and effective area utilization.
Elective I Subjects (VLSI 904/X)
1. Advanced System Architecture
Advanced System Architecture(VLSI 904/1)
Classification of parallel computing structures; Instruction level parallelism-static and dynamic pipelining, improving branch performance, super scaler and VLIW processors; High performance memory system; shared memory multiprocessors and cache coherence; multiprocessor interconnection networks; performance modeling; issues in programming multiprocessor; parallel architectures.
2. Soft Computing
Soft Computing (VLSI 904/2)
Introduction & Motivation; Biological Neural Networks and simple models; The Artificial Neuron model; Hopfield Nets; Energy Functions and Optimization; Perceptrons & Threshold Logic Machines; Multilayer Networks – their variants-and applications; Capacity – of – Multilayer Networks; Back propagation; Recurrent Nets; Tree Structure Networks; Unsupervised Learning; Hebbian Learning; Principal Component Analysis; Competitive Learning, Feature Mapping, Self Organizing Maps, Adaptive Resonance Theory, – Hardware Realization of ANNs Recent Trends.
3. Computer Networking
Computer Networking(VLSI 904/3)
Networks, goals, applications, classifications, layered architecture, OSI model. Statistical multiplexing; point to point and broadcast communications, multi access protocols; ALOHA, CSMA and its variations, token ring; error control techniques; flow control; data link layer protocols; bridges, repeaters; switches and spanning tree protocol. Routing, congestion control, internet protocols; multicast routing and reliable multicast, Mobile IP.
Elective II Subjects (VLSI 905/X)
1. Discrete St. & Graph Algorithm
Discrete St. & Graph Algorithm (VLSI 905/1)
Fundamental structures; Functions (surjections, injections, inverses, composition); relations (reflexivity, symmetry, transitivity, equivalence relations); sets (Venn diagrams, complements, Cartesian products, power sets); pigeonhole principle; cardinality and countability, Basic logic; Propositional logic; logical connectives; truth tables; normal forms (conjunctive and disjunctive); validity; predicate logic; limitations of predicate logic, universal and existential quantification; modus ponens and modus tollens. Proof techniques; Notions of implication, converse, inverse, contrapositive, negation, and contradiction; the structure of formal proofs; direct proof by counterexample; proof by contraposition; proof by contradiction; mathematical induction; strong induction; recursive mathematical definitions; well orderings. Basics of counting arguments; pigeonhole; principle; permutations and combinations; inclusion exclusion, recurrence relations, generating functions.
2. Digital Signal Processing
Digital Signal Processing (VLSI 905/2)
Discrete time signals and systems, Z-transforms. Structures for Design procedure for FIR and IIR filters Frequency transformations; Linear phase design. Introduction to DFT, FFT, NTT and WTFA, Noise analysis in digital filters; Power spectrum estimations; Introduction to multidimensional DSP.
II. SECOND SEMESTER (Section B Examination)
(A) Theory Papers a) Field Subjects |
|||
Sl. No. |
Field Subjects |
Weekly Contact Hours |
Marks |
1 | Paper VI : VLSI Physical Design (VLSI 1001) | 3 | 100 |
2 | Paper VII : Analog IC Design (VLSI 1002) | 3 | 100 |
3 | Paper VIII : VLSI Technology (VLSI 1003) | 3 | 100 |
4 | Paper IX : Synthesis and Verification Techniques (VLSI 1004) | 3 | 100 |
b) Elective Subjects | |||
Sl. No. |
Field Subjects |
Weekly Contact Hours |
Marks |
5 | Paper X : (Elective III) (VLSI 1005/X) | 3 | 100 |
(B) Sessional Subjects | |||
Sl. No. |
Field Subjects |
Weekly Contact Hours |
Marks |
6 a) | Term Paper and/or project related to thesis/Laboratory Sessionals (VLSI 1051) | 6 | 100 |
6 b) | Seminar on Term Paper and/or project related to thesis/Laboratory Sessional (VLSI 1052) | --- | 50 |
Total | 21 | 650 | |
VLSI Physical Design (VLSI 1001)
Introduction : VLSI Design Process, Different Layout Styles-Full Custom, Gate array, Standard-Cell, Micro-cell, PLA, FPGA etc, Packaging, Difficulties in Physical Design, Computational Complexity, Definitions of nets, net list, weighted nets, grids, trees, distances etc.
Circuit Partitioning : Introduction, problem definition, cost function and constraints, Approach to partitioning (Karninghan-lin, Fiduccia Mattheyses, Simulated annealing etc.), performance driven partitioning.
Floor planning : Introduction, problem definition, cost function, approach to floor planning (Cluster growth, SA etc.), Performance driven floor planning.
Placement : Introduction, problem definition, cost function, approach to Placement (Partition-base min-cut, SA etc.) Performance driven floor Placement.
Routing : Introduction, Fundamentals (Maze-running, Line Searching, Steiner trees) Global Routing-different approaches, Detailed Routing-Channel as switch box Routing Performance driven Routing.
Compaction : Different Compaction techniques.
Analog IC Design (VLSI 1002)
Introduction to the design and implementation of analog integrated circuits in CMOS, Bi-CMOS and Bipolar technologies with the emphasis on CMOS Op-amp application circuits and ,op-amp application circuits and, op-amp characteristics, Transistor level view of a two-stage op-amp, Review of CMOS process technology and device characteristics processing, large-signal device equation , Review Of DC bias solution principles using the two-stage op-amp as an example, Review of the Device ,small-signal models using the two-stage op-amp as an example –basic gain stage-common source common-drain stages- differential amplifier, active loading , half circuit analysis, CMRR- , body effect Basic principles of analog IC Design. Matching –Process of temperature variations, Introduction to feedback circuits, Loop gain, Reference circuits and voltage regulators, Current and it voltage references; Temperature and power supply sensitivity band gap references, output stages, Audio and RF power amplifier examples, device high frequency small –signal models & Capacitance. Simplified BW and high-frequency analysis-Zero value time constant (ZVTC) method for BW estimation –n-extra element theorem (n-EET) for high frequency dynamics; BW limitations of basic gain stages common source and cascade amplifier, slew rate and BW limitations and amps, Frequency compensation techniques, Examples of analysis and design of more advanced analog building blocks, Op-amp design procedures, Fully differential amplifiers-common mode feedback, Current-mode Circuits, Modulators and demodulators.
VLSI Technology (VLSI 1003)
Introduction to mixed signals, Basic IC processing step, oxidation, diffusion, Ficks laws, sheet resistivity, Ion implantation, Epitaxy : basic of vacuum deposition, Chemical vapour depositions, high and low temperature/pressure depositions, Etching techniques, Standard bipolar NMOS and CMOS process sequences, Techniques for process evaluation analysis, In process measurements, Novel structures in bipolar and MOS :VMOS etc. Introduction to process modeling.
Synthesis and verification Techniques (VLSI 1004)
Overview of the VLSI design flow, hardware modeling principles and hardware description using the VHDL language are covered, major steps involved in behavioral synthesis; scheduling, allocation and binding, register-transfer level synthesis, (retiming and Finite state Machine encoding), Logic synthesis, consisting of combinational logic optimization and technology mapping, popular chip architectures-standard cells and FPGA.
Elective III Subjects (VLSI 1005/X)
1. Low Power Design Techniques
Low Power Design Techniques (VLSI 1005/1)
Basics of processor design, Processor design trade-:offs, Introduction to low power digital design, voltage-scaling approaches, Minimizing Switched Capacitance, Circuit and system Level power management, Leakage currents Roadmap issues related to low power, GALS and local dynamic voltage scaling, Influence of logic Level statistics and Circuits Topologies on the Node Transition Activity Factor, arithmetic circuits and low power flow complexity design, low power design issues for analog and mixed signal ICs.
2. Mixed Signal Circuit Design
Mixed signal Circuit Design (VLSI 1005/2)
BiCMOS: Devices and Technology, Basic analog and digital Subsircuits, Current mode signal Processing Current Mode circuits, Continuous Time and Sampled Data Signal Processing, ADC and DACs; Nyquist and Oversampled Converters, analog VLSI Inter Connects: Physics and Scaling of Inter connects, Statistical Modeling of Device and Circuits, Analog Computer aided design, Analog and Mixed, Analog & Digital Circuits Layout.
3. RF IC Design
RF IC Design (VLSI 1005/3)
Review of bi-polar and unipolar transistor models. Theory and design of operational amplifiers, Definition and measurements of performance characteristics, Linear and non linear applications, D/A and A/D converters, MOS operational amplifier timers. Function generators; antennas and detectors; Multipliers PLL.
III. THIRD SEMESTER (Section C Examination)
{jcomments off}
Sl.No. | Subjucts | Marks |
1 | Elective IV (1151/X) | 50 |
2 | Project Report on Thesis | 50 |
3 | Seminar & Viva Voce | 50 |
Total | 150 |
Elective IV Subjects (VLSI 1151/X)
1. Emerging Technologies : MEMS, Biochips, Nano-electronics
Emerging Technologies (VLSI 1150/1).
MEMS, Biochips Nano-electronics :
2. SOC and Memory Design and test
SOC and Memory Design and Test (VLSI 1150/2)
Review of MOS structure, Scaled Down MOSFET and CMOS Processing, Processing for Memories; Multi poly Floating Gate and Control Gate, Trench Capacitors and thin oxide, Inverter Design; Choice of W/L and Noise Margin Calculation, Casecade and differential Inverters, SRAM and DRAM Cell Design: Basic Cell Structures, modeling and Design, Equations, Sense Amplifiers; Necessity for Sense Amplifier, Voltage and Current Sense Amplifiers, Reference Voltage Generation, Influence of Sense Amplifier, Performance on cell architecture, Peripheral Circuits Memory Testing; Modeling, Introduction to Functional Testing, Memory BIST. System-on-chip design process, System-on-chip modeling, Function-architecture co-design, Platform based design, Communication-networks on chip, operating systems for systems on chip software design for embedded systems.
3. Quantum Computation and Circuits
Quantum Computation and Circuits (VLSI 1150/3)
Overview, State Transition Systems, Nondeterministic Transition Systems, Stochastic Transition Systems, stochastic Transition systems and quantum Transition Systems, Exponentially. Destructive interdference. Measurement Complex Inner Product spaces, Eigenvalues and Eigenvectors, Diagonalization, Tensor products, Quantum states, Unitary Evolution, Observables, Operators and Commutativity. The Qubit. Entanglement, Schrodinger’s cat, Basic quantum gates, Simple quantum algorithms, Quantum-dot cellular automata.
4. Selected topics on advanced Technologies
IV. FOURTH SEMESTER
Sl.No. | Subjects | Marks |
1 | Thesis | 250 |
2 | Viva Voce | 100 |
Total | 350 |
Ph.D. programs
The PhD. programs are postgraduate research oriented programs. The scholar works in an area of his/her interest under the supervision of a faculty member. The scholar has to obtain a minimum number of credits by taking courses. The highlight of the program is the independent research work taken by scholar, leading to a dissertation at the end of the program. The average duration of a PhD. program is between four to five years.