Research

My 25 years of research experience in the area of Computer Science and Engineering is primarily

focused on Logic Synthesis and Testing of VLSI Circuits, DFT,BIST design, Test-Pattern Generation,

Fault-Tolerant  Computing, Fault Diagnosis, Low Power Design, Image Processing and Synthesis 

and Testing of Quantum Circuit and Bio-chip. These works have been done in collaboration with the scientists

working at Advanced Computing Unit, Indian Statistical Institute, University of Potsdam, Germany,

Nara Institute of Science and Technology, Japanand Professor John P.Hays, Shannon Professor

of EngineeringScience,University of Michigan, Advanced Computer Architecture Lab.

1987-88(Part time)                        : :      Dept. of Computer Science and Engg.

                                                               Calcutta University (Prof. A.K.Chowdhury)

1988-89(Full time)                         : :     Dept. of Electronics and Telecommucation

                                                              Engineering, Jadavpur University.

1989 to onwards                          : :     Indian Statistical Institute, Advance Computin

                                                              & micro-electronics,203 B.T Road, Kolkata.

                                                               (Professor Bhargab B. Bhattacharya)

2000 Sept.                 .                   : :    Institute of Computer Science,University

                                                              of Potsdam, Germany.

                                                              (Professor Michael Gossel)

                        Topic   :                       “ Fault diagnosis and Testing of VlSI  

                                                               circuits”

2003 -  2004                                  : :     NAIST, Nara, Japan

                                                               (Professor H. Fujiwara)

                                                               “Testing of sequential machine” and

                                                               “ Low power Design of circuit”

2007,                                              : :     University of Michigan, USA.

                                                               Professor John.P.Hayes)

                                                               “ Test pattern generation of Quantum circuit”

• INVITATED FELLOWSHIP FROM GERMANY AS A GUEST SCIENTIST

I was invited from Institute of Information Technology, University of Potsdam, Germany with

invited German Gov Fellowship, worked as a guest scientist with Prof. M. Gossel  who is

internationally renowned in the area of VLSI  testing and fault diagnosis in the year 2000

because my research work was considered of high International standard. 

•   JSPS FELLOWSHIP  Of INDIAN NATIONAL SCIENCE ACADEMY(INSA)

Indian National Science Academy nominated me for  the JSPS Fellowship in the session 2003-2004

and worked with Professor H. Fujiwara of Nara Institute of Science and Technology, Japan,

University of National  Importance in the area of Test Generation of Sequential Circuits and Low Power Design.

•  Invitation from  University of Michigan, Ann Arbor, USA 

                I was invited from University Michigan, Advanced Computer Architecture Lab, deptt 

                of   and worked with Professor John P.Hays, Shannon Professor of Engineering

                Science  in the area of   “ Test pattern generation of Quantum circuit”.

• Visited  Delft University, Netherlands in the year 2007.

•  Invited Lecture and Visit in NAIST, JAPAN

I was invited Nara Institute of Science and Technology Nara, Japan to  deliver a Lecture on

“ Synthesis and Redundancy of Balanced Ternary Logic Function in Quantum Circuit.”  in 2013.