Dr.Sudip Ghosh.

Assistant Professor

School of VLSI Technology

Academic Qualifications

• Ph.D. (Engineering), Indian Institute of Engineering Science and Technology, Shibpur (IIESTS), 2017.
• M.S. (VLSI CAD), 2005
• B.E. (Electronics & Communication Engineering), 2001

Contact

Phone

1. Mobile:

Address

1. Permanent address:
2. Present address:
3. Email: sudip.ghosh@vlsi.iiests.ac.in,sudipghosh2005@gmail.com

Area of Research

• FPGA and SoC based Digital Watermarking Architectures.
• Synthesis and Verification of Digital circuits.
• VLSI Testing.
• Advanced Computer Architectures.
• Image and Video signal processing hardware architectures.

Courses Undertaken

PG Courses

• VLSI Testing (VLSI-903)
• Advanced System Architecture (VLSI-904/1)
• Synthesis and Verification Techniques (VLSI-1004)
• SoC and Memory Design and Test (VLSI-1150/2)
• Digital Signal Processing (VLSI-905/2)

Recent Publications (Last 10)

1. SambaranHazra, SudipGhosh, Sayandip De and HafizurRahaman "FPGA implementation of semi-fragile reversible watermarking by histogram bin shifting in real time" in special issue of Springer journal of Real-Time Image Processing, pp 1-29, online from 22nd February 2017. doi : 10.1007/s11554-017-0672-9
2. SambaranHazra, SudipGhosh, Santi P. Maity, HafizurRahaman "New FPGA and Programmable SoC Based VLSI Architecture for Histogram Generation of Grayscale Images for Image Processing Applications" in 6th International Conference On Advances In Computing & Communications, ICACC 2016, 6-8 September 2016, Cochin, India. vol. 93, Pp. 139–145. url : http://dx.doi.org/10.1016/j.procs.2016.07.193
3. SudipGhosh, SambaranHazra, Santi P Maity and HafizurRahaman "A New Algorithm for Grayscale Image Histogram Computation" in 12th IEEE India International Conference (INDICON) 2015 from 17-20 December 2015 at JamiaMilliaIslamia, New Delhi, India. pp. 1-6. url: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7443463
4. SudipGhosh, Sayandip De, Santi Prasad Maity and HafizurRahaman "A Novel Dual Purpose Spatial Domain Algorithm for Digital Image Watermarking and Cryptography Using Extended Hamming Code" in 2nd IEEE International Conference on Electrical Information and Communication Technologies (EICT-2015) from 10-12 December 2015 at Khulna University of Engineering and Technology (KUET), Khulna, Bangladesh. pp. 167-172.
5. SudipGhosh, Nachiketa Das, Subhajit Das, Santi P Maity and HafizurRahaman " An Adaptive Feedback based Reversible Watermarking Algorithm using Difference Expansion" in IEEE 2nd International Conference on Recent Trends in Information Systems (RETIS 2015) from 9-11 July 2015 at Jadavpur University, Kolkata, India.pp. 207-212. url: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7232879
6. SudipGhosh,SubhojitChatterjee, Santi P Maity and HafizurRahaman "A New Algorithm On Wavelet Based Robust Invisible Digital Image Watermarking for Multimedia Security" in International Conference on Electronic Design, Computer Networks & Automated Verification (EDCAV 2015) from 29-30th January 2015 at Shillong,NIT Meghalaya, India. pp. 72-77. url: http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=7060542
7. SudipGhosh, Nachiketa Das, SubhajitDas,Santi P Maity and HafizurRahaman "Digital Design and Pipelined Architecture for Reversible Watermarking Based on Difference Expansion using FPGA" in 13th IEEE International Conference on Information Technology (ICIT 2014) from 22nd -24th December, 2014 at Bhubaneswar,Orrisa, India. pp. 123-128. url: http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=7033308
8. SudipGhosh, ArijitBiswas, Santi P Maity and HafizurRahaman "Design of an Improved Algorithm for Blind Digital Image Watermarking Using Both Grayscale and Binary Watermark in DFWHT Domain" in 8th IEEE International Conference on Electrical and Computer Engineering (ICECE 2014) from 20-22 December 2014 at Pan Pacific Sonargaon,Dhaka, Bangladesh. pp. 112-115. url: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7026944
9. SudipGhosh, ArijitBiswas,Santi P Maity and HafizurRahaman "Design of A Low Complexity and Fast Hardware Architecture for Digital Image Watermarking in FWHT Domain on FPGA" in 5th IEEE International Symposium on Electronic System Design (ISED 2014) from December 15 - 17, 2014 at NIT Surathkal, Mangalore,India. pp. 68-72. url: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7172749
10. SudipGhosh, Nachiketa Das, SubhajitDas,Santi P Maity and HafizurRahaman "FPGA and SoC Based VLSI Architecture of Reversible Watermarking Using Rhombus Interpolation By Difference Expansion" in 11th IEEE India Conference INDICON 2014 from 11th to 13th December 2014 at Yashada,Pune,India. pp. 1-6. url: http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=7030612

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